In the simplest implementation, magnetic random access memory (MRAM) cells comprise at least a magnetic tunnel junction formed of two magnetic layers separated by a thin insulating layer, where one of the layer, the so-called reference layer, is characterized by a fixed magnetization and the second layer, the so-called storage layer, is characterized by a magnetization which direction can be changed upon writing of the memory. When the respective magnetizations of the reference layers and the storage layer are antiparallel, the resistance of the magnetic tunnel junction is high (Rmax), corresponding to a low logic state “0”. On the other hand, when the respective magnetizations are parallel, the resistance of the magnetic tunnel junction becomes low (Rmin), corresponding to a low logic state “1”. The logic state of the MRAM cell is read by comparing its resistance state to a reference resistance Rref, preferably derived from a reference cell or an array of reference cells, with a reference resistance of typically Rref=(Rmin+Rmax)/2, combined in-between the magnetic tunnel junction resistance of the high logic state “1” and the resistance of the low logic state “0”.
In conventional practical implementations, the reference layer is “exchange biased” to an adjacent antiferromagnetic reference layer characterized by a critical temperature (above which the exchange bias vanishes) known as the blocking temperature TBR of the antiferromagnetic reference layer.
In an implementation of the MRAM cell using a thermally assisted switching (TAS) procedure, for example as described in U.S. Pat. No. 6,950,335, the storage layer is also exchange biased to an adjacent antiferromagnetic storage layer which blocking temperature TBS (the temperature at which the exchange bias of the antiferromagnetic storage layer vanishes) is lower than that the blocking temperature TBR of the antiferromagnetic reference layer pinning the reference layer. Below the blocking temperature TBS, the storage layer is difficult and/or impossible to write. Writing is then performed by heating the magnetic tunnel junction above TBS but below TBR, preferably but not limited to by sending a heating current through the magnetic tunnel junction, in order to free the magnetization of the storage layer, while simultaneously applying means of switching the magnetization of the storage layer. The latter can be performed either by a magnetic field, generated by a field current, or by the so-called spin transfer torque (STT) effect, where a spin transfer torque current, in which the spin is polarized, is passed through the magnetic tunnel junction. The magnetic tunnel junction is then cooled down below the blocking temperature TBS, where the storage layer magnetization is “frozen” in the written direction.
The magnetic field magnitude required to switch the magnetization direction of the storage layer is proportional to the coercivity of the storage layer, which is large at small feature sizes and can be greatly enhanced in exchange biased films. In the other hand, the spin torque current must be lower than the heating current, therefore forcing the use of high heating currents, since the magnitude of spin torque current is large in TAS-MRAM cells (>1 MA/cm2).
Moreover, in the current implementation of the TAS-MRAM cell described above, the write operating temperature window defined by TBR−TBS is typically small. Indeed, a blocking temperature TBR up to about 350° C. can be attained when the antiferromagnetic reference layer is made of a NiMn-based alloy, while a blocking temperature TBS ranging typically between 150° C. and 200° C. is achieved when the antiferromagnetic storage layer is made of an IrMn-based alloy or a FeMn-based alloy, respectively.
In the case of a magnetic memory device formed by assembling an array comprising a plurality of memory TAS-MRAM cells, the properties of the individual cells across the array may vary due to fabrication process fluctuations. This can result in a distribution of the blocking temperatures TBR and TBS for the array amounting to typically up to about ±30° C., further reducing the writing operating temperature window. These variations can also impact directly on the resistance of the magnetic tunnel junctions of the different MRAM cells, therein reducing the difference between the measured magnetic tunnel junction resistance and the reference cell resistance, Rmin/max−Rref. Consequently, a tight process control is required in order to produce a memory device having a high performance and a high efficiency, impacting on production yield and/or costs.
Moreover, when the magnetic memory device is used in extreme environments, where local ambient temperatures in the vicinity of the cells can be high, using an antiferromagnetic storage layer having a blocking temperature TBS higher than 200° C. can become necessary, further reducing the operating temperature window. Such high local temperatures can also be caused, alone or in addition to high ambient temperatures, by local current-induced heat transfer in the magnetic memory device itself or in a neighbouring magnetic memory device. Consequently, the above implementation may limit applications of the memory device in environments such as spatial, military, automotive, etc.
A high ambient local temperature can also result in a heating temperature that exceeds TBR during the writing procedure, resulting in freeing the magnetization of the reference layer and thus, erasing the cell data. In order to avoid this situation, a temperature controller is typically introduced within the circuit driving the heating current in order to account for ambient and/or local temperature fluctuations.
Finally, the speed of the writing procedure mostly depends on the speed at which the magnetic tunnel junction of the TAS-MRAM cell can be heated. Here, the more power sent into the magnetic tunnel junction the faster the heating, since high power heating is performed in adiabatic conditions instead of dissipative conditions. However, in conventional implementations of the TAS-MRAM cell, the heating speed is limited by possible overshooting the temperature above TBR when a high power is sent into the magnetic tunnel junction.